Digital design and programming/数字设计与编程
西安电子科技大学
主讲教师：康槿
• Understand fundamental concepts and methodology of digital systems design using FPGA
• Understand the fundamentals of combinatorial logic
• Gain proficiency in applying the method of designing minimal combinatorial circuits with
fundamental logic
• Understand the fundamentals of sequential logic design with simple finite state machines
(FSMs)
• Gain proficiency in applying the method of designing digital logic
• Gain proficiency in the FSM design, physical implementation and testing of simple
• Gain proficiency with integration of datapath and controller into simple verilog processor
• Gain proficiency with an industry standard digital system design tool for design entry,
simulation, implementation, and
• Apply the knowledge of controller design for physical implementation, with skills of
software/hardware implementation and understanding of an FPGA embedded computation
board
…
| 学校： | 西安电子科技大学 |
| 开课院系： | 通信工程学院 |
| 课程编号： | B38DB |
| 学分： | 4 |
| 课时： | 64 |
| 课程章节 | | 文件类型 | | 大小 | | 备注 | |
| 1.1 Introduction – Digital Signals |
文档
.pdf
|
1.80MB | ||
|
视频
.mp4
|
436.44MB | |||
| 1.2 Combinatorial Logic Design – Logic Gates, Decoders, Multiplexers |
文档
.pdf
|
1.67MB | ||
|
视频
.mp4
|
453.24MB | |||
| 1.3 Combinatorial Logic Design – Karnaugh Maps |
文档
.pptx
|
662.27KB | ||
|
视频
.mp4
|
452.80MB | |||
| 1.4 verilog HDL |
视频
.mp4
|
432.56MB | ||
|
文档
.pdf
|
937.77KB | |||
|
文档
.pdf
|
151.86KB | |||
| 1.5 Tutorial1 |
视频
.mp4
|
203.27MB | ||
| 1.6 Sequential Logic Design – Flip Flops |
文档
.pdf
|
661.68KB | ||
| 1.7 Sequential Logic Design – Finite State Machines |
文档
.pdf
|
587.54KB | ||
| 1.8 Sequential Logic Design – Controller Design |
文档
.pdf
|
513.93KB | ||
| 1.9 Sequential Logic Design – Controller Examples |
文档
.pdf
|
1.07MB | ||
| 1.10 Tutorial2 |
视频
.mp4
|
42.52MB | ||
| 1.11 Datapath Components – Registers, Adders and Comparators |
文档
.pdf
|
711.97KB | ||
| 1.12 Datapath components – Subtractors and Counters |
视频
.mp4
|
42.52MB | ||
|
文档
.pdf
|
650.16KB | |||
| 1.13 Datapath components –ALU, Register file |
文档
.pdf
|
591.41KB | ||
| 1.14 Pre_Lab |
文档
.pdf
|
1.44MB | ||
|
文档
.pdf
|
640.01KB | |||
| 1.15 Tutorial3 |
视频
.mp4
|
42.52MB | ||
| 1.16 Part1_Revision |
文档
.pdf
|
1.32MB | ||
| 2.1 Programmable Processor |
文档
.pdf
|
1009.45KB | ||
| 2.2 Simple Data Path |
文档
.pdf
|
599.23KB | ||
| 2.3 Register-transfer level |
文档
.pdf
|
2.72MB | ||
| 2.4 High-Level State Machines |
文档
.pdf
|
1.13MB | ||
| 2.5 Tutorial4 |
视频
.mp4
|
42.52MB | ||
| 2.6 Computational Hardware |
文档
.pdf
|
1.10MB | ||
| 2.7 Revision&more |
文档
.pdf
|
2.17MB |
文档